G.8262: Signal interruptions and Discontinuities

There are two sections in G.8262 that cause some confusion because they are not well explained or defined. These are the “Input Signal Interruption” (clause 11.3) and “Phase Discontinuity” (clause 11.4).

These clauses originally came from G.813, which was written almost 30 years ago, and were intended for the SONET/SDH network.   The first version of G.8262 (back in 2007) was basically a copy of G.813 to make sure the EEC was compatible with the SDH clocking system, and these clauses were copied verbatim from G.813 without much thought as to the implications in an Ethernet context.

A few years ago they were re-discussed in Q13, the ITU-T committee responsible for synchronisation standards, because it wasn’t clear what these sections actually meant. Some notes were added in the November 2018 revision of G.8262, although as you will see, the situation is still not totally clear

Short term interruption (clause 11.3)

The main issue with this clause is that it does not define what a short-term interruption is. The interruption is defined in terms of its effect on the clock, not in terms of what it actually is. For example, a short-term interruption to a sync reference is one that doesn’t cause the clock receiving it to switch references (and implicitly, doesn’t cause the clock to go into holdover).

There is a continuum of effects here, based on how long an interruption lasts:

  • If the interruption is short, it might cause a transient (defined here), but doesn’t cause the clock to switch references

  • If the interruption is long, it might cause the device to switch references, or if no other reference is available, to go into holdover

From a test perspective that is unsatisfactory, because there is no information about how to create an appropriate stimulus that would cause the transient. The text does not say how long the interruption should last for to be considered short. For example, the device vendor could complain that the interruption is too long, so the clock went into reference switching, hence the limit was inappropriate.

The transient is not allowed to last longer than 16ms, so presumably it has to be less than 16ms. However, Calnex’s Ethernet experts told me that any such interruption would break the auto-negotiation in Ethernet, and it would take a few seconds to re-establish the link. Therefore while this might have worked in SDH, it clearly wouldn’t work in Ethernet. Since the interruption takes the link down, it would not be possible to verify the transient at the receiving clock.

The following notes were added to G.8262 clause 11.3 after this discussion (the 2018/11 version). They don’t exactly clarify things from the point of view of how to test it, but help a little to clarify the context:

NOTE 1 – If the input signal experiences a short-term interruption, the clock may take action such as entering holdover until the input signal is restored, or selecting another input source, or other implementation specific behaviour.

NOTE 2 – The characteristics of a short-term interruption that would cause the equipment clock to take different courses of action, and that are not already covered in this Recommendation, should be considered implementation specific. These characteristics may include length of interruption or magnitude of phase change on the input signal before and after the interruption.

Basically these notes mean that everything is implementation specific, so there is no way to design a single test for this effect, and in effect it is an untestable requirement.

 To summarise:

  • There is no definition of what a short-term interruption is, e.g. how long it can last

  • There is no consideration of what might happen to the Ethernet connection itself, and the resulting re-establishment of the link 

  • It is an untestable requirement

Phase discontinuity (clause 11.4)

This was also revisited a few years ago since the language was not clear. The original requirement stated:

In cases of infrequent internal testing or other internal disturbances (but excluding major hardware failures, e.g., those that would give rise to clock equipment protection switches) within the equipment clock, the following conditions should be met:

What is “infrequent internal testing”? Or an “internal disturbance”?

In fact, this refers to manual switchover by operators for maintenance or testing purposes. This can be tested in a similar manner to the short-term phase transient described in clause 11.1, but where the switchover between two input clocks is manually initiated in the device under test. 

The following additional note was added to the 2018/11 version to :

NOTE – Infrequent internal testing or other internal disturbances could refer, for instance, to equipment protection switching between two internal clock cards within the synchronous Ethernet equipment clock (excluding major hardware failures) or maintenance activity.

The transient described in clause 11.4 is the same as that described in clause 11.1, which makes sense given that the main differentiator between the two is that in 11.4, the switchover is manually generated, but in 11.1, it is automatically generated.

It is not possible to implement an automatic test for this, because it requires manual intervention via the command interface of the DUT. However, a manual test can be performed, by setting up the Paragon instrument to monitor the output, and then initiate the switch in the DUT. The transient mask would then need to be manually aligned to the stimulus to determine conformance.